aboutsummaryrefslogtreecommitdiff
path: root/llvm/lib/CodeGen/InterferenceCache.cpp
diff options
context:
space:
mode:
authorJakob Stoklund Olesen <stoklund@2pi.dk>2012-02-14 23:53:23 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2012-02-14 23:53:23 +0000
commitc4cf13f7912c1e5336592434d314d4b5aebc78c6 (patch)
tree426d6ca63dc2c739909e0e5e612985ac2c1dccc4 /llvm/lib/CodeGen/InterferenceCache.cpp
parentb0c0d340f8d86ee712ea2c06acec1ba703d0aa6e (diff)
downloadllvm-c4cf13f7912c1e5336592434d314d4b5aebc78c6.zip
llvm-c4cf13f7912c1e5336592434d314d4b5aebc78c6.tar.gz
llvm-c4cf13f7912c1e5336592434d314d4b5aebc78c6.tar.bz2
Fix global live range splitting regmask accuracy.
Pretend that regmask interference ends at the 'dead' slot, even when there is other interference ending at the 'reg' slot of the same instruction. llvm-svn: 150531
Diffstat (limited to 'llvm/lib/CodeGen/InterferenceCache.cpp')
-rw-r--r--llvm/lib/CodeGen/InterferenceCache.cpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/InterferenceCache.cpp b/llvm/lib/CodeGen/InterferenceCache.cpp
index a8a32f3..9eb8a758 100644
--- a/llvm/lib/CodeGen/InterferenceCache.cpp
+++ b/llvm/lib/CodeGen/InterferenceCache.cpp
@@ -185,7 +185,8 @@ void InterferenceCache::Entry::update(unsigned MBBNum) {
// Also check for register mask interference.
SlotIndex Limit = BI->Last.isValid() ? BI->Last : Start;
- for (unsigned i = RegMaskSlots.size(); i && RegMaskSlots[i-1] > Limit; --i)
+ for (unsigned i = RegMaskSlots.size();
+ i && RegMaskSlots[i-1].getDeadSlot() > Limit; --i)
if (MachineOperand::clobbersPhysReg(RegMaskBits[i-1], PhysReg)) {
// Register mask i-1 clobbers PhysReg after the LIU interference.
// Model the regmask clobber as a dead def.