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authorSerguei Katkov <serguei.katkov@azul.com>2017-06-21 06:38:23 +0000
committerSerguei Katkov <serguei.katkov@azul.com>2017-06-21 06:38:23 +0000
commit0b0dc57dd88d99257fcc0d4e206e2fc60dba4bd3 (patch)
tree5a1f69ca5073d52d25ce7d520d587e98d48e2070 /llvm/lib/CodeGen/ImplicitNullChecks.cpp
parent676b457b8b694f5ee277ad2dd0eb1c8a984ca2e8 (diff)
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[ImplicitNullChecks] Uphold an invariant in areMemoryOpsAliased
Right now areMemoryOpsAliased has an assertion justified as: MMO1 should have a value due it comes from operation we'd like to use as implicit null check. assert(MMO1->getValue() && "MMO1 should have a Value!"); However, it is possible for that invariant to not be upheld in the following situation (conceptually): Null check %RAX NotNullSucc: %RAX = LEA %RSP, 16 // I0 %RDX = MOV64rm %RAX // I1 With the current code, we will have an early exit from ImplicitNullChecks::isSuitableMemoryOp on I0 with SR_Unsuitable. However, I1 will look plausible (since it loads from %RAX) and will go ahead and call areMemoryOpsAliased(I1, I0). This will cause us to fail the assert mentioned above since I1 does not load from an IR level value and thus is allowed to have a non-Value base address. The fix is to bail out earlier whenever we see an unsuitable instruction overwrite PointerReg. This would guarantee that when we call areMemoryOpsAliased, we're guaranteed to be looking at an instruction that loads from or stores to an IR level value. Original Patch Author: sanjoy Reviewers: sanjoy, mkazantsev, reames Reviewed By: sanjoy Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D34385 llvm-svn: 305879
Diffstat (limited to 'llvm/lib/CodeGen/ImplicitNullChecks.cpp')
-rw-r--r--llvm/lib/CodeGen/ImplicitNullChecks.cpp39
1 files changed, 15 insertions, 24 deletions
diff --git a/llvm/lib/CodeGen/ImplicitNullChecks.cpp b/llvm/lib/CodeGen/ImplicitNullChecks.cpp
index b831ddf..e308f49 100644
--- a/llvm/lib/CodeGen/ImplicitNullChecks.cpp
+++ b/llvm/lib/CodeGen/ImplicitNullChecks.cpp
@@ -359,30 +359,15 @@ ImplicitNullChecks::isSuitableMemoryOp(MachineInstr &MI, unsigned PointerReg,
Offset < PageSize))
return SR_Unsuitable;
- // Finally, we need to make sure that the access instruction actually is
- // accessing from PointerReg, and there isn't some re-definition of PointerReg
- // between the compare and the memory access.
- // If PointerReg has been redefined before then there is no sense to continue
- // lookup due to this condition will fail for any further instruction.
- SuitabilityResult Suitable = SR_Suitable;
- for (auto *PrevMI : PrevInsts)
- for (auto &PrevMO : PrevMI->operands()) {
- if (PrevMO.isReg() && PrevMO.getReg() && PrevMO.isDef() &&
- TRI->regsOverlap(PrevMO.getReg(), PointerReg))
- return SR_Impossible;
-
- // Check whether the current memory access aliases with previous one.
- // If we already found that it aliases then no need to continue.
- // But we continue base pointer check as it can result in SR_Impossible.
- if (Suitable == SR_Suitable) {
- AliasResult AR = areMemoryOpsAliased(MI, PrevMI);
- if (AR == AR_WillAliasEverything)
- return SR_Impossible;
- if (AR == AR_MayAlias)
- Suitable = SR_Unsuitable;
- }
- }
- return Suitable;
+ // Finally, check whether the current memory access aliases with previous one.
+ for (auto *PrevMI : PrevInsts) {
+ AliasResult AR = areMemoryOpsAliased(MI, PrevMI);
+ if (AR == AR_WillAliasEverything)
+ return SR_Impossible;
+ if (AR == AR_MayAlias)
+ return SR_Unsuitable;
+ }
+ return SR_Suitable;
}
bool ImplicitNullChecks::canHoistInst(MachineInstr *FaultingMI,
@@ -569,6 +554,12 @@ bool ImplicitNullChecks::analyzeBlockForNullChecks(
return true;
}
+ // If MI re-defines the PointerReg then we cannot move further.
+ if (any_of(MI.operands(), [&](MachineOperand &MO) {
+ return MO.isReg() && MO.getReg() && MO.isDef() &&
+ TRI->regsOverlap(MO.getReg(), PointerReg);
+ }))
+ return false;
InstsSeenSoFar.push_back(&MI);
}