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| author | Craig Topper <craig.topper@sifive.com> | 2025-09-05 22:00:12 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-09-05 22:00:12 -0700 |
| commit | 77db18a1e19c2a04df0210befcab1d66f44a7512 (patch) | |
| tree | c6918c4d26d350bad65b25a93cc55352fed24840 /llvm/lib/CodeGen/ExpandVectorPredication.cpp | |
| parent | 5eaf1295418da71551730d8dab87dcde795f57a0 (diff) | |
| download | llvm-77db18a1e19c2a04df0210befcab1d66f44a7512.zip llvm-77db18a1e19c2a04df0210befcab1d66f44a7512.tar.gz llvm-77db18a1e19c2a04df0210befcab1d66f44a7512.tar.bz2 | |
[TargetInstrInfo][AArch64] Don't assume register came from operand 0 in canCombine (#157210)
We already have the register number from the user operand. Use it
instead of assuming it must be operand 0 of the producing instruction.
Fixes #157118
Diffstat (limited to 'llvm/lib/CodeGen/ExpandVectorPredication.cpp')
0 files changed, 0 insertions, 0 deletions