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author | Aiden Grossman <aidengrossman@google.com> | 2024-11-24 16:58:01 -0800 |
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committer | GitHub <noreply@github.com> | 2024-11-24 16:58:01 -0800 |
commit | 095f489757ead08184dd340f14a7b6158db6b0a3 (patch) | |
tree | 1e6816f7a952c4817c32cef1d2a4732ad7cf51d2 /llvm/lib/CodeGen/ExpandVectorPredication.cpp | |
parent | 2a5e3a67a0248db4a6981e343f0033a32ad4a577 (diff) | |
download | llvm-095f489757ead08184dd340f14a7b6158db6b0a3.zip llvm-095f489757ead08184dd340f14a7b6158db6b0a3.tar.gz llvm-095f489757ead08184dd340f14a7b6158db6b0a3.tar.bz2 |
[X86] Swap ports 10 and 11 in SapphireRapids Scheduling Model (#117468)
Based on intel/perfmon#149, the documentation is incorrect and the pfm
counter names are actually correct. This patch adjusts the
SapphireRapids scheduling model to match the performance counter naming/
correct naming that will soon be reflected in the optimization manual.
This fixes part of #117360.
Diffstat (limited to 'llvm/lib/CodeGen/ExpandVectorPredication.cpp')
0 files changed, 0 insertions, 0 deletions