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| author | Daniel Sanders <daniel_l_sanders@apple.com> | 2019-08-01 23:27:28 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel_l_sanders@apple.com> | 2019-08-01 23:27:28 +0000 |
| commit | 2bea69bf6503ffc9f3cde9a52b5dac1a25e94e1c (patch) | |
| tree | 91dc8f6a4635d24a9c93d1e5080a67b8baae69f8 /llvm/lib/CodeGen/EarlyIfConversion.cpp | |
| parent | 9debb024d44db54b9453459d3bd98d28c20a163f (diff) | |
| download | llvm-2bea69bf6503ffc9f3cde9a52b5dac1a25e94e1c.zip llvm-2bea69bf6503ffc9f3cde9a52b5dac1a25e94e1c.tar.gz llvm-2bea69bf6503ffc9f3cde9a52b5dac1a25e94e1c.tar.bz2 | |
Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Register as started by r367614. NFC
llvm-svn: 367633
Diffstat (limited to 'llvm/lib/CodeGen/EarlyIfConversion.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/EarlyIfConversion.cpp | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/llvm/lib/CodeGen/EarlyIfConversion.cpp b/llvm/lib/CodeGen/EarlyIfConversion.cpp index 0a83760..00a5ce2 100644 --- a/llvm/lib/CodeGen/EarlyIfConversion.cpp +++ b/llvm/lib/CodeGen/EarlyIfConversion.cpp @@ -235,11 +235,11 @@ bool SSAIfConv::canSpeculateInstrs(MachineBasicBlock *MBB) { unsigned Reg = MO.getReg(); // Remember clobbered regunits. - if (MO.isDef() && TargetRegisterInfo::isPhysicalRegister(Reg)) + if (MO.isDef() && Register::isPhysicalRegister(Reg)) for (MCRegUnitIterator Units(Reg, TRI); Units.isValid(); ++Units) ClobberedRegUnits.set(*Units); - if (!MO.readsReg() || !TargetRegisterInfo::isVirtualRegister(Reg)) + if (!MO.readsReg() || !Register::isVirtualRegister(Reg)) continue; MachineInstr *DefMI = MRI->getVRegDef(Reg); if (!DefMI || DefMI->getParent() != Head) @@ -289,7 +289,7 @@ bool SSAIfConv::findInsertionPoint() { if (!MO.isReg()) continue; unsigned Reg = MO.getReg(); - if (!TargetRegisterInfo::isPhysicalRegister(Reg)) + if (!Register::isPhysicalRegister(Reg)) continue; // I clobbers Reg, so it isn't live before I. if (MO.isDef()) @@ -423,8 +423,8 @@ bool SSAIfConv::canConvertIf(MachineBasicBlock *MBB) { if (PI.PHI->getOperand(i+1).getMBB() == FPred) PI.FReg = PI.PHI->getOperand(i).getReg(); } - assert(TargetRegisterInfo::isVirtualRegister(PI.TReg) && "Bad PHI"); - assert(TargetRegisterInfo::isVirtualRegister(PI.FReg) && "Bad PHI"); + assert(Register::isVirtualRegister(PI.TReg) && "Bad PHI"); + assert(Register::isVirtualRegister(PI.FReg) && "Bad PHI"); // Get target information. if (!TII->canInsertSelect(*Head, Cond, PI.TReg, PI.FReg, |