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| author | Chris Dewhurst <chris.dewhurst@lero.ie> | 2016-02-27 12:52:26 +0000 |
|---|---|---|
| committer | Chris Dewhurst <chris.dewhurst@lero.ie> | 2016-02-27 12:52:26 +0000 |
| commit | 0a2c033e2d791c77d7d2ece42c8c1b0a6d46bb14 (patch) | |
| tree | 84696f00769682ff75157349409a1adfb657429c /llvm/lib/CodeGen/DFAPacketizer.cpp | |
| parent | 83e76327e8308073690cd7a8b6caab56cdbe49e5 (diff) | |
| download | llvm-0a2c033e2d791c77d7d2ece42c8c1b0a6d46bb14.zip llvm-0a2c033e2d791c77d7d2ece42c8c1b0a6d46bb14.tar.gz llvm-0a2c033e2d791c77d7d2ece42c8c1b0a6d46bb14.tar.bz2 | |
Addition of tests to previous check-in. Tests for coprocessor register usage in Sparc.
Previous check-in message was:
The patch adds missing registers and instructions to complete all the registers supported by the Sparc v8 manual.
These are all co-processor registers, with the exception of the floating-point deferred-trap queue register.
Although these will not be lowered automatically by any instructions, it allows the use of co-processor
instructions implemented by inline-assembly.
Code Reviewed at http://reviews.llvm.org/D17133, with the exception of a very small change in brace placement in SparcInstrInfo.td,
which was formerly causing a problem in the disassembly of the %fq register.
llvm-svn: 262135
Diffstat (limited to 'llvm/lib/CodeGen/DFAPacketizer.cpp')
0 files changed, 0 insertions, 0 deletions