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authorJay Foad <jay.foad@amd.com>2023-03-29 15:11:08 +0100
committerJay Foad <jay.foad@amd.com>2023-03-31 14:56:27 +0100
commit8bad806f298c4ddc476c708ece0664e21924ba41 (patch)
treece55ead5af7cf3fb007e59540f378256b1d71f2b /llvm/lib/CodeGen/CommandFlags.cpp
parent8d2899acbcf1b8ce120bc219aeb30207d4422042 (diff)
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[AMDGPU] Do not reserve 16-bit registers
There should be no need to reserve all SGPR hi16/lo16 halves, or all AGPR hi16 halves. This should be done by marking the corresponding register classes as not allocatable instead. Differential Revision: https://reviews.llvm.org/D147158
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