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| author | Albion Fung <albionapc@gmail.com> | 2020-08-28 11:27:07 -0500 |
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| committer | Albion Fung <albionapc@gmail.com> | 2020-08-28 11:28:58 -0500 |
| commit | 331dcc43eac28b8e659f928fd1f1ce7fd091e1e3 (patch) | |
| tree | 120dc0f44b7870bef5a2818a3eaed49d28af47ab /llvm/lib/CodeGen/CommandFlags.cpp | |
| parent | fabd4c1ae1fc573eb83ba9541e133a265c5549da (diff) | |
| download | llvm-331dcc43eac28b8e659f928fd1f1ce7fd091e1e3.zip llvm-331dcc43eac28b8e659f928fd1f1ce7fd091e1e3.tar.gz llvm-331dcc43eac28b8e659f928fd1f1ce7fd091e1e3.tar.bz2 | |
[PowerPC] Implemented Vector Load with Zero and Signed Extend Builtins
This patch implements the builtins for Vector Load with Zero and Signed Extend Builtins (lxvr_x for b, h, w, d), and adds the appropriate test cases for these builtins. The builtins utilize the vector load instructions itnroduced with ISA 3.1.
Differential Revision: https://reviews.llvm.org/D82502#inline-797941
Diffstat (limited to 'llvm/lib/CodeGen/CommandFlags.cpp')
0 files changed, 0 insertions, 0 deletions