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| author | Matthias Braun <matze@braunis.de> | 2022-05-03 10:53:34 -0700 |
|---|---|---|
| committer | Matthias Braun <matze@braunis.de> | 2022-05-10 10:00:10 -0700 |
| commit | cd19af74c031f0f538050d00b26bab3fbca07414 (patch) | |
| tree | 0133b92e1ad7dc8ac817a4451b369cf520623fa3 /llvm/lib/CodeGen/CodeGenPrepare.cpp | |
| parent | 75e50f70c6fd461cae915fc4983faf4127a6059f (diff) | |
| download | llvm-cd19af74c031f0f538050d00b26bab3fbca07414.zip llvm-cd19af74c031f0f538050d00b26bab3fbca07414.tar.gz llvm-cd19af74c031f0f538050d00b26bab3fbca07414.tar.bz2 | |
Avoid 8 and 16bit switch conditions on x86
This adds a `TargetLoweringBase::getSwitchConditionType` callback to
give targets a chance to control the type used in
`CodeGenPrepare::optimizeSwitchInst`.
Implement callback for X86 to avoid i8 and i16 types where possible as
they often incur extra zero-extensions.
This is NFC for non-X86 targets.
Differential Revision: https://reviews.llvm.org/D124894
Diffstat (limited to 'llvm/lib/CodeGen/CodeGenPrepare.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/CodeGenPrepare.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/CodeGenPrepare.cpp b/llvm/lib/CodeGen/CodeGenPrepare.cpp index 4eeaf3d..b4b78c4 100644 --- a/llvm/lib/CodeGen/CodeGenPrepare.cpp +++ b/llvm/lib/CodeGen/CodeGenPrepare.cpp @@ -6984,7 +6984,7 @@ bool CodeGenPrepare::optimizeSwitchInst(SwitchInst *SI) { Type *OldType = Cond->getType(); LLVMContext &Context = Cond->getContext(); EVT OldVT = TLI->getValueType(*DL, OldType); - MVT RegType = TLI->getRegisterType(Context, OldVT); + MVT RegType = TLI->getPreferredSwitchConditionType(Context, OldVT); unsigned RegWidth = RegType.getSizeInBits(); if (RegWidth <= cast<IntegerType>(OldType)->getBitWidth()) |