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| author | Craig Topper <craig.topper@sifive.com> | 2021-09-21 09:54:17 -0700 |
|---|---|---|
| committer | Craig Topper <craig.topper@sifive.com> | 2021-09-21 10:07:29 -0700 |
| commit | aeb63d464f30db5e32da1449a650eec8c85d95bd (patch) | |
| tree | 706984dbd076ad9c53939bb596f888a976deaff2 /llvm/lib/CodeGen/CodeGenPrepare.cpp | |
| parent | 908c1154421287c6ffa0ef06ef5225a8fd0b06a7 (diff) | |
| download | llvm-aeb63d464f30db5e32da1449a650eec8c85d95bd.zip llvm-aeb63d464f30db5e32da1449a650eec8c85d95bd.tar.gz llvm-aeb63d464f30db5e32da1449a650eec8c85d95bd.tar.bz2 | |
[RISCV] Teach RISCVTargetLowering::shouldSinkOperands to sink splats for and/or/xor.
This requires a minor change to CodeGenPrepare to ensure that
shouldSinkOperands will be called for And.
Reviewed By: frasercrmck
Differential Revision: https://reviews.llvm.org/D110106
Diffstat (limited to 'llvm/lib/CodeGen/CodeGenPrepare.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/CodeGenPrepare.cpp | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/CodeGenPrepare.cpp b/llvm/lib/CodeGen/CodeGenPrepare.cpp index 365e252..dc772e8 100644 --- a/llvm/lib/CodeGen/CodeGenPrepare.cpp +++ b/llvm/lib/CodeGen/CodeGenPrepare.cpp @@ -7859,8 +7859,9 @@ bool CodeGenPrepare::optimizeInst(Instruction *I, bool &ModifiedDT) { BinaryOperator *BinOp = dyn_cast<BinaryOperator>(I); - if (BinOp && (BinOp->getOpcode() == Instruction::And) && EnableAndCmpSinking) - return sinkAndCmp0Expression(BinOp, *TLI, InsertedInsts); + if (BinOp && BinOp->getOpcode() == Instruction::And && EnableAndCmpSinking && + sinkAndCmp0Expression(BinOp, *TLI, InsertedInsts)) + return true; // TODO: Move this into the switch on opcode - it handles shifts already. if (BinOp && (BinOp->getOpcode() == Instruction::AShr || |