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| author | Evan Cheng <evan.cheng@apple.com> | 2012-01-13 01:37:24 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2012-01-13 01:37:24 +0000 |
| commit | fa8326334b12183f71c8eb1d44147b51887a17be (patch) | |
| tree | 4120b99b843f55e3d7f587613edb5ec0d9a964c8 /llvm/lib/CodeGen/CodeGen.cpp | |
| parent | e31b88833ac0a3f0b9a77d49ec8e7a9437f0e991 (diff) | |
| download | llvm-fa8326334b12183f71c8eb1d44147b51887a17be.zip llvm-fa8326334b12183f71c8eb1d44147b51887a17be.tar.gz llvm-fa8326334b12183f71c8eb1d44147b51887a17be.tar.bz2 | |
DAGCombine's logic for forming pre- and post- indexed loads / stores were being
overly conservative. It was concerned about cases where it would prohibit
folding simple [r, c] addressing modes. e.g.
ldr r0, [r2]
ldr r1, [r2, #4]
=>
ldr r0, [r2], #4
ldr r1, [r2]
Change the logic to look for such cases which allows it to form indexed memory
ops more aggressively.
rdar://10674430
llvm-svn: 148086
Diffstat (limited to 'llvm/lib/CodeGen/CodeGen.cpp')
0 files changed, 0 insertions, 0 deletions