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| author | Jun Ma <JunMa@linux.alibaba.com> | 2023-02-16 15:36:07 +0800 |
|---|---|---|
| committer | Jun Ma <JunMa@linux.alibaba.com> | 2023-02-17 09:17:47 +0800 |
| commit | f253bb640d97756d2808bb7c7b2bb31b1090a654 (patch) | |
| tree | ec167ea475230afa6cc968c11f7d0107021b3bdc /llvm/lib/CodeGen/CodeGen.cpp | |
| parent | e073de833671159f89d72a1018d4444335cc042d (diff) | |
| download | llvm-f253bb640d97756d2808bb7c7b2bb31b1090a654.zip llvm-f253bb640d97756d2808bb7c7b2bb31b1090a654.tar.gz llvm-f253bb640d97756d2808bb7c7b2bb31b1090a654.tar.bz2 | |
[WebAssembly] Fix simd bit shift intrinsics codegen
According to github.com/WebAssembly/simd/blob/main/proposals/simd/SIMD.md,
the shift count of bit shift instructions is taken modulo lane width.
This patch adds such operation.
Fixes PR#60655
Differential Revision: https://reviews.llvm.org/D144169
Diffstat (limited to 'llvm/lib/CodeGen/CodeGen.cpp')
0 files changed, 0 insertions, 0 deletions