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| author | Christudasan Devadasan <Christudasan.Devadasan@amd.com> | 2021-12-09 02:55:21 -0500 |
|---|---|---|
| committer | Christudasan Devadasan <Christudasan.Devadasan@amd.com> | 2021-12-10 03:10:34 -0500 |
| commit | cf58b9ce98043d4c9af5ffb5b47a18009b145b5b (patch) | |
| tree | 911cf21fe21ce6a59f208fa7cf19f16bb36ad5a1 /llvm/lib/CodeGen/CodeGen.cpp | |
| parent | d3cd0635e15a16fdf890c79035438c0f7c0d63b1 (diff) | |
| download | llvm-cf58b9ce98043d4c9af5ffb5b47a18009b145b5b.zip llvm-cf58b9ce98043d4c9af5ffb5b47a18009b145b5b.tar.gz llvm-cf58b9ce98043d4c9af5ffb5b47a18009b145b5b.tar.bz2 | |
[AMDGPU] Add AV class spill pseudo instructions
While enabling vector superclasses with D109301,
the AV spills are converted into VGPR spills by
introducing appropriate copies. The whole thing
ended up adding two instructions per spill (a copy
+ vgpr spill pseudo) and caused an incorrect
liverange update during inline spiller.
This patch adds the pseudo instructions for all
AV spills from 32b to 1024b and handles them in
the way all other spills are lowered.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D115439
Diffstat (limited to 'llvm/lib/CodeGen/CodeGen.cpp')
0 files changed, 0 insertions, 0 deletions