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authorThomas Raoux <thomas.raoux@gmail.com>2019-08-20 15:54:59 +0000
committerThomas Raoux <thomas.raoux@gmail.com>2019-08-20 15:54:59 +0000
commitbe699bf38995f940225aa31b520be00721e258b2 (patch)
tree9357a33564220276f7445e42bda674a2c30444c7 /llvm/lib/CodeGen/CodeGen.cpp
parent6585f018ada85c53efeec28fb6b1d9c978c209f7 (diff)
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[CodeGen] Add a pass to do block predication on SSA machine IR.
For targets requiring aggressive scheduling and/or software pipeline we need to apply predication before preRA scheduling. This adds a pass re-using the early if-cvt infrastructure but generating predicated instructions instead of speculatively executing instructions. It allows doing if conversion on blocks containing instructions with side-effects. The pass re-use the target hook from postRA if-conversion to let the target decide on the heuristic to apply. Differential Revision: https://reviews.llvm.org/D66190 llvm-svn: 369395
Diffstat (limited to 'llvm/lib/CodeGen/CodeGen.cpp')
-rw-r--r--llvm/lib/CodeGen/CodeGen.cpp1
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/CodeGen.cpp b/llvm/lib/CodeGen/CodeGen.cpp
index c37ed57..c637629 100644
--- a/llvm/lib/CodeGen/CodeGen.cpp
+++ b/llvm/lib/CodeGen/CodeGen.cpp
@@ -28,6 +28,7 @@ void llvm::initializeCodeGen(PassRegistry &Registry) {
initializeDetectDeadLanesPass(Registry);
initializeDwarfEHPreparePass(Registry);
initializeEarlyIfConverterPass(Registry);
+ initializeEarlyIfPredicatorPass(Registry);
initializeEarlyMachineLICMPass(Registry);
initializeEarlyTailDuplicatePass(Registry);
initializeExpandMemCmpPassPass(Registry);