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| author | Xiang1 Zhang <xiang1.zhang@intel.com> | 2020-12-16 20:12:01 -0800 |
|---|---|---|
| committer | Xiang1 Zhang <xiang1.zhang@intel.com> | 2020-12-16 20:12:33 -0800 |
| commit | 1e42ad9d629157a9bba53d3c216e3182bcb1408f (patch) | |
| tree | b50506872aedcf31506f735c8db7b98e3a8eac49 /llvm/lib/CodeGen/CodeGen.cpp | |
| parent | a5e4a513b0410c7ebafc7b8cc00903220536f555 (diff) | |
| download | llvm-1e42ad9d629157a9bba53d3c216e3182bcb1408f.zip llvm-1e42ad9d629157a9bba53d3c216e3182bcb1408f.tar.gz llvm-1e42ad9d629157a9bba53d3c216e3182bcb1408f.tar.bz2 | |
Revert "[Debugify] Support checking Machine IR debug info"
This reverts commit 50aaa8c274910d78d7bf6c929a34fe58b1f45579.
Diffstat (limited to 'llvm/lib/CodeGen/CodeGen.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/CodeGen.cpp | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/CodeGen.cpp b/llvm/lib/CodeGen/CodeGen.cpp index 9492549..92a2b73 100644 --- a/llvm/lib/CodeGen/CodeGen.cpp +++ b/llvm/lib/CodeGen/CodeGen.cpp @@ -25,7 +25,6 @@ void llvm::initializeCodeGen(PassRegistry &Registry) { initializeBranchRelaxationPass(Registry); initializeCFGuardLongjmpPass(Registry); initializeCFIInstrInserterPass(Registry); - initializeCheckDebugMachineModulePass(Registry); initializeCodeGenPreparePass(Registry); initializeDeadMachineInstructionElimPass(Registry); initializeDebugifyMachineModulePass(Registry); |