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| author | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-05-08 12:40:48 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-05-08 12:40:48 +0000 |
| commit | d39320c6b69b6fcc453ab2a6ff108fd58ab20f16 (patch) | |
| tree | 6746b070ad6081267204eace3c1747705d5dea44 /llvm/lib/CodeGen/BasicTargetTransformInfo.cpp | |
| parent | 05cd586863baee861623b523fef310c3af37eafd (diff) | |
| download | llvm-d39320c6b69b6fcc453ab2a6ff108fd58ab20f16.zip llvm-d39320c6b69b6fcc453ab2a6ff108fd58ab20f16.tar.gz llvm-d39320c6b69b6fcc453ab2a6ff108fd58ab20f16.tar.bz2 | |
[mips] Marked up instructions added in MIPS-II and tested that IAS for -mcpu=mips1 does not accept them
Summary:
A small number of instructions are rejected with the wrong error message.
These have been placed in a separate test for now. There seems to be some
parsing quirk that triggers when these instructions are disabled.
Depends on D3571
Reviewers: vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D3647
llvm-svn: 208305
Diffstat (limited to 'llvm/lib/CodeGen/BasicTargetTransformInfo.cpp')
0 files changed, 0 insertions, 0 deletions