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| author | Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> | 2014-05-06 17:09:03 +0000 |
|---|---|---|
| committer | Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> | 2014-05-06 17:09:03 +0000 |
| commit | c14ccc9184fc1bf02212fb85fdce36e9be8558d5 (patch) | |
| tree | 04df0d8eeefdac20a3303a8df8c3e4943b575f99 /llvm/lib/CodeGen/BasicTargetTransformInfo.cpp | |
| parent | 29020cc571d564976555ec0eef26b53fc0590a6b (diff) | |
| download | llvm-c14ccc9184fc1bf02212fb85fdce36e9be8558d5.zip llvm-c14ccc9184fc1bf02212fb85fdce36e9be8558d5.tar.gz llvm-c14ccc9184fc1bf02212fb85fdce36e9be8558d5.tar.bz2 | |
[X86] Improve the lowering of BITCAST dag nodes from type f64 to type v2i32 (and vice versa).
Before this patch, the backend always emitted a store+load sequence to
bitconvert from f64 to i64 the input operand of a ISD::BITCAST dag node that
performed a bitconvert from type MVT::f64 to type MVT::v2i32. The resulting
i64 node was then used to build a v2i32 vector.
With this patch, the backend now produces a cheaper SCALAR_TO_VECTOR from
MVT::f64 to MVT::v2f64. That SCALAR_TO_VECTOR is then followed by a "free"
bitcast to type MVT::v4i32. The elements of the resulting
v4i32 are then extracted to build a v2i32 vector (which is illegal and
therefore promoted to MVT::v2i64).
This is in general cheaper than emitting a stack store+load sequence
to bitconvert the operand from type f64 to type i64.
llvm-svn: 208107
Diffstat (limited to 'llvm/lib/CodeGen/BasicTargetTransformInfo.cpp')
0 files changed, 0 insertions, 0 deletions