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| author | Aditi Medhane <Aditi.Medhane@amd.com> | 2024-09-19 13:57:44 +0530 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-09-19 13:57:44 +0530 |
| commit | 60a8b2b1d0842e257e2add6fb1b27cf45699b641 (patch) | |
| tree | 9d821757ee71337a984b5edf708338c166d41434 /llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp | |
| parent | 959448fbd6bc6f74fb3f9655b1387d0e8a272ab8 (diff) | |
| download | llvm-60a8b2b1d0842e257e2add6fb1b27cf45699b641.zip llvm-60a8b2b1d0842e257e2add6fb1b27cf45699b641.tar.gz llvm-60a8b2b1d0842e257e2add6fb1b27cf45699b641.tar.bz2 | |
[AMDGPU] Add MachineVerifier check to detect illegal copies from vector register to SGPR (#105494)
Addition of a check in the MachineVerifier to detect and report illegal
vector registers to SGPR copies in the AMDGPU backend, ensuring correct
code generation.
We can enforce this check only after SIFixSGPRCopies pass.
This is half-fix in the pipeline with the help of isSSA MachineFuction
property, the check is happening for passes after phi-node-elimination.
Diffstat (limited to 'llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp')
0 files changed, 0 insertions, 0 deletions