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| author | Paul Walker <paul.walker@arm.com> | 2025-04-03 13:15:05 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-04-03 13:15:05 +0100 |
| commit | 41a6bb4c055cf08110676d9bc942f369fb19450d (patch) | |
| tree | 181b9c55be07134a730f9058bea4fe983e11c7cc /llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp | |
| parent | 722346c7bc70aa528beccead4119db83f134f5cd (diff) | |
| download | llvm-41a6bb4c055cf08110676d9bc942f369fb19450d.zip llvm-41a6bb4c055cf08110676d9bc942f369fb19450d.tar.gz llvm-41a6bb4c055cf08110676d9bc942f369fb19450d.tar.bz2 | |
[LLVM][CodeGen][SVE] Prefer NEON instructions when zeroing Z registers. (#133929)
Several implementations have zero-latency instructions to zero
registers. To-date no implementation has a dedicated SVE instruction but
we can use the NEON equivalent because it is defined to zero bits
128..VL regardless of the immediate used.
NOTE: The relevant instruction is not available in streaming mode, where
the original SVE DUP instruction remains in use.
Diffstat (limited to 'llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp')
0 files changed, 0 insertions, 0 deletions