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| author | Momchil Velikov <momchil.velikov@arm.com> | 2023-11-21 16:44:14 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2023-11-21 16:44:14 +0000 |
| commit | 28f62d72f4d56de0db0ed20c9b8c309ec5e8e193 (patch) | |
| tree | 87d3d65949b8fe5ec51d3ccb9aff261dfcce68dd /llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp | |
| parent | c0a1fcd3bf8ead39e8f0290a8a0af1e0367c7cad (diff) | |
| download | llvm-28f62d72f4d56de0db0ed20c9b8c309ec5e8e193.zip llvm-28f62d72f4d56de0db0ed20c9b8c309ec5e8e193.tar.gz llvm-28f62d72f4d56de0db0ed20c9b8c309ec5e8e193.tar.bz2 | |
[AArch64] Add SVE2.1 intrinsics for indexed quadword gather loads and scatter stores (#70476)
This patch adds the quadword gather load intrinsics of the form
sv<type>_t svld1q_gather_u64index_<typ>(svbool_t, const <type>_t *, svuint64_t);
sv<type>_t svld1q_gather_u64base_index_<typ>(svbool_t, svuint64_t, int64_t);
and the quadword scatter store intrinsics of the form
void svst1q_scatter_u64index_<typ>(svbool_t, <type>_t *, svuint64_t, sv<type>_t);
void svst1q_scatter_u64base_index_<typ>(svbool, svuint64_t, int64_t, sv<type>_t);
ACLE spec: https://github.com/ARM-software/acle/pull/257
Diffstat (limited to 'llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp')
0 files changed, 0 insertions, 0 deletions