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authorAlex Bradbury <asb@igalia.com>2024-09-19 13:39:56 +0100
committerGitHub <noreply@github.com>2024-09-19 13:39:56 +0100
commit0ee10e9466603f9e55e6044b5070f65b8182dae1 (patch)
treea05e0ea4a78d002b1ced4aabb20dd3aa6467b5bc /llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp
parenta6ab19b1d400707c6e6cb6074ae52e22ac7885dd (diff)
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[RISCV] Add additional fence for amocas when required by recent ABI change (#101023)
A recent atomics ABI change / fix requires that for the "A6C" and A6S" atomics ABIs (i.e. both of those supported by LLVM currently), an additional fence is inserted for an atomic_compare_exchange with seq_cst failure ordering. <https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/445> This isn't trivial to support through the hooks used by AtomicExpandPass because that pass assumes that when fences are inserted, the original atomics ordering information can be removed from the instruction. Rather than try to change and complicate that API, this patch implements the needed fence insertion through a small special purpose pass.
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