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authorHazemAbdelhafez <23439402+HazemAbdelhafez@users.noreply.github.com>2020-06-22 10:04:53 -0400
committerLei Zhang <antiagainst@google.com>2020-06-22 10:11:33 -0400
commit02022ff2e3f2f4d39d5926e93ecfa77395a1e9ea (patch)
tree90d926f18dbb8ede9300d1f03a09d2632fe8d2da /llvm/lib/CodeGen/AsmPrinter/DebugHandlerBase.cpp
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[mlir][spirv] Enhance AccessChainOp index type handling
This patch extends the AccessChainOp index type handling to be able to deal with all Integer type indices (i.e., all bit-widths and signedness symantics). There were two ways of achieving this: 1- Backward compatible: The new way of handling the indices will assume that an index type is i32 by default if not specified in the assembly format, this way all the old tests would pass correctly. 2- Enforce the format: This unifies the spv.AccessChain Op format and all the old tests had to be updated to reflect this change or else they fail. I picked option-2 to unify the Op format and avoid having optional index-type fields that can lead to somewhat confusing tests format and multiple representations for the same Op with undocumented assumption that an index is i32 unless stated. Nonetheless, reverting to option-1 should be straightforward if preferred or needed. Differential Revision: https://reviews.llvm.org/D81763
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