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author | Tim Renouf <tpr.llvm@botech.co.uk> | 2019-05-16 21:49:06 +0000 |
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committer | Tim Renouf <tpr.llvm@botech.co.uk> | 2019-05-16 21:49:06 +0000 |
commit | e3cbdaf1b5e7960041e879843722e6ac55ad54f2 (patch) | |
tree | bcaf70ca6bf4a0c8d80d28d76f029be604ec461d /llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.h | |
parent | d029bf0f8c456cf34060918cd32d70b91d672672 (diff) | |
download | llvm-e3cbdaf1b5e7960041e879843722e6ac55ad54f2.zip llvm-e3cbdaf1b5e7960041e879843722e6ac55ad54f2.tar.gz llvm-e3cbdaf1b5e7960041e879843722e6ac55ad54f2.tar.bz2 |
[CodeGen] Fixed de-optimization of legalize subvector extract
The recent introduction of v3i32 etc as an MVT, and its use in AMDGPU
3-dword memory instructions, caused a de-optimization problem for code
with such a load that then bitcasts via vector of i8, because v12i8 is
not an MVT so it legalizes the bitcast by widening it.
This commit adds the ability to widen a bitcast using extract_subvector
on the result, so the value does not need to go via memory.
Differential Revision: https://reviews.llvm.org/D60457
Change-Id: Ie4abb7760547e54a2445961992eafc78e80d4b64
llvm-svn: 360942
Diffstat (limited to 'llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.h')
0 files changed, 0 insertions, 0 deletions