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| author | Craig Topper <craig.topper@sifive.com> | 2021-04-21 00:25:42 -0700 |
|---|---|---|
| committer | Craig Topper <craig.topper@sifive.com> | 2021-04-21 14:50:29 -0700 |
| commit | a8822caa1baee753273d44b483a636a179791fdc (patch) | |
| tree | 052d2b96e7e0c6287a7ac52b91e49b8b6f5e9443 /llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp | |
| parent | 64f47c1e58a10de160ce3fb3afbc50c0243e2977 (diff) | |
| download | llvm-a8822caa1baee753273d44b483a636a179791fdc.zip llvm-a8822caa1baee753273d44b483a636a179791fdc.tar.gz llvm-a8822caa1baee753273d44b483a636a179791fdc.tar.bz2 | |
[RISCV] Temporary in vmsge(u).vx pseudo instructions can't be V0.
This was checked in some asserts, but not enforced by the
instruction matching.
There's still a second bug that we don't check that vt and vd
are different registers, but that will require custom checking.
Differential Revision: https://reviews.llvm.org/D100928
Diffstat (limited to 'llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp')
0 files changed, 0 insertions, 0 deletions