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| author | Simi Pallipurath <simi.pallipurath@arm.com> | 2018-03-06 15:21:19 +0000 |
|---|---|---|
| committer | Simi Pallipurath <simi.pallipurath@arm.com> | 2018-03-06 15:21:19 +0000 |
| commit | 75c6bfeac9480c6f2877522f064e71dd4c43a6e9 (patch) | |
| tree | 2b9744697d8e8b2d1c0b9b8e99b99bfd685798ff /llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp | |
| parent | a9daa969c13f7ffc55db6eb32ca928fb855c3394 (diff) | |
| download | llvm-75c6bfeac9480c6f2877522f064e71dd4c43a6e9.zip llvm-75c6bfeac9480c6f2877522f064e71dd4c43a6e9.tar.gz llvm-75c6bfeac9480c6f2877522f064e71dd4c43a6e9.tar.bz2 | |
[ARM]Decoding MSR with unpredictable destination register causes an assert
This patch handling:
Enable parsing of raw encodings of system registers .
Allows UNPREDICTABLE sysregs to be decoded to a raw number in the same way that disasslib does, rather than llvm crashing.
Disassemble msr/mrs with unpredictable sysregs as SoftFail.
Fix regression due to SoftFailing some encodings.
Patch by Chris Ryder
Differential revision:https://reviews.llvm.org/D43374
llvm-svn: 326803
Diffstat (limited to 'llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp')
0 files changed, 0 insertions, 0 deletions