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| author | Craig Topper <craig.topper@intel.com> | 2018-04-09 19:17:54 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-04-09 19:17:54 +0000 |
| commit | 304edc1e75f7c1342853e4f974534573edf6da01 (patch) | |
| tree | 9d5fa98379b4f82a588a3de7110d8129baa52f9d /llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp | |
| parent | 3a0cab73ebb331240fde36370da7f30e9b42dc5f (diff) | |
| download | llvm-304edc1e75f7c1342853e4f974534573edf6da01.zip llvm-304edc1e75f7c1342853e4f974534573edf6da01.tar.gz llvm-304edc1e75f7c1342853e4f974534573edf6da01.tar.bz2 | |
[X86] Emit native IR for pmuldq/pmuludq builtins.
I believe all the pieces are now in place in the backend to make this work correctly. We can either mask the input to 32 bits for pmuludg or shl/ashr for pmuldq and use a regular mul instruction. The backend should combine this to PMULUDQ/PMULDQ and then SimplifyDemandedBits will remove the and/shifts.
Differential Revision: https://reviews.llvm.org/D45421
llvm-svn: 329605
Diffstat (limited to 'llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp')
0 files changed, 0 insertions, 0 deletions