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author | Sanjay Patel <spatel@rotateright.com> | 2016-12-05 15:58:21 +0000 |
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committer | Sanjay Patel <spatel@rotateright.com> | 2016-12-05 15:58:21 +0000 |
commit | 1f158d6955a31b4decf03c5bf2d568f5e29cc2e8 (patch) | |
tree | ed20ceafce3222143305f6c5b0556c6bbcde28a0 /llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp | |
parent | f807f6a05fbaa06a2a37cf01dc1df7dc357648e9 (diff) | |
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[TargetLowering] add special-case for demanded bits analysis of 'not'
We treat bitwise 'not' as a special operation and try not to reduce its all-ones mask.
Presumably, this is because a 'not' may be cheaper than a generic 'xor' or it may get
folded into another logic op if the target has those. However, if we can remove a logic
instruction by changing the xor's constant mask value, that should always be a win.
Note that the IR version of SimplifyDemandedBits() does not treat 'not' as a special-case
currently (although that's marked with a FIXME). So if you run this IR through -instcombine,
you should get the same end result. I'm hoping to add a different backend transform that
will expose this problem though, so I need to solve this first.
Differential Revision: https://reviews.llvm.org/D27356
llvm-svn: 288676
Diffstat (limited to 'llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp')
0 files changed, 0 insertions, 0 deletions