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| author | Kazushi (Jam) Marukawa <marukawa@nec.com> | 2020-04-06 09:17:20 +0200 |
|---|---|---|
| committer | Simon Moll <simon.moll@emea.nec.com> | 2020-04-06 11:49:46 +0200 |
| commit | e981a46a772f598709f08f28021dbdf40c8b65ea (patch) | |
| tree | 135921bbe4371a316e1150b6fc454f03981e3651 /llvm/lib/Bitcode | |
| parent | a294d9eb2152ccd5c44b9e45ad291a199a944c56 (diff) | |
| download | llvm-e981a46a772f598709f08f28021dbdf40c8b65ea.zip llvm-e981a46a772f598709f08f28021dbdf40c8b65ea.tar.gz llvm-e981a46a772f598709f08f28021dbdf40c8b65ea.tar.bz2 | |
[VE] Update lea/load/store instructions
Summary:
Modify lea/load/store instructions to accept `disp(index, base)`
style addressing mode (called ASX format). Also, uniform the
number of DAG nodes to have 3 operands for this ASX format
instructions, and update selectADDR functions to lower
appropriate MI.
Reviewers: arsenm, simoll, k-ishizaka
Reviewed By: simoll
Differential Revision: https://reviews.llvm.org/D76822
Diffstat (limited to 'llvm/lib/Bitcode')
0 files changed, 0 insertions, 0 deletions