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| author | Marina Yatsina <marina.yatsina@intel.com> | 2016-01-19 15:37:56 +0000 |
|---|---|---|
| committer | Marina Yatsina <marina.yatsina@intel.com> | 2016-01-19 15:37:56 +0000 |
| commit | b9f4f62cfe15dd6dc2c827c6cc9c51f72f933c5c (patch) | |
| tree | d714ae4d0361b0a733cae932cb9af859b942340f /llvm/lib/Bitcode | |
| parent | b5d539380a9b548f28ffa067067f90d3139ca767 (diff) | |
| download | llvm-b9f4f62cfe15dd6dc2c827c6cc9c51f72f933c5c.zip llvm-b9f4f62cfe15dd6dc2c827c6cc9c51f72f933c5c.tar.gz llvm-b9f4f62cfe15dd6dc2c827c6cc9c51f72f933c5c.tar.bz2 | |
[X86] Adding support for missing variations of X86 string related instructions
The following are legal according to X86 spec:
ins mem, DX
outs DX, mem
lods mem
stos mem
scas mem
cmps mem, mem
movs mem, mem
Differential Revision: http://reviews.llvm.org/D14827
llvm-svn: 258132
Diffstat (limited to 'llvm/lib/Bitcode')
0 files changed, 0 insertions, 0 deletions