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| author | Pierre van Houtryve <pierre.vanhoutryve@amd.com> | 2022-10-17 07:56:20 +0000 |
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| committer | Pierre van Houtryve <pierre.vanhoutryve@amd.com> | 2022-10-21 06:36:07 +0000 |
| commit | 824dd811be421cd946f64c25eb8ef3ac47eb19f2 (patch) | |
| tree | a838872d4ee3286e252e719287e9f2c5ae65e48a /llvm/lib/Bitcode | |
| parent | 34020d39b8a116770aad0b5ad1a450e6e22da5cd (diff) | |
| download | llvm-824dd811be421cd946f64c25eb8ef3ac47eb19f2.zip llvm-824dd811be421cd946f64c25eb8ef3ac47eb19f2.tar.gz llvm-824dd811be421cd946f64c25eb8ef3ac47eb19f2.tar.bz2 | |
[AMDGPU][DAG] Fix trunc/shift combine condition
The condition needs to be different for right-shifts, else we may lose information in some cases.
Reviewed By: foad
Differential Revision: https://reviews.llvm.org/D136059
Diffstat (limited to 'llvm/lib/Bitcode')
0 files changed, 0 insertions, 0 deletions