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| author | Craig Topper <craig.topper@sifive.com> | 2022-03-28 16:44:57 -0700 |
|---|---|---|
| committer | Craig Topper <craig.topper@sifive.com> | 2022-03-28 16:56:33 -0700 |
| commit | 01203918d1c409397f64fc65723fda450fec7129 (patch) | |
| tree | 7334b43adc8890b84c5808fa8ab6c944d1ec3ef4 /llvm/lib/Bitcode/Writer/BitcodeWriterPass.cpp | |
| parent | 1a963d3278c2daab7e12125371442cd129c09954 (diff) | |
| download | llvm-01203918d1c409397f64fc65723fda450fec7129.zip llvm-01203918d1c409397f64fc65723fda450fec7129.tar.gz llvm-01203918d1c409397f64fc65723fda450fec7129.tar.bz2 | |
[RISCV] Add computeKnownBits support for RISCVISD::GORC.
Reviewed By: luismarques
Differential Revision: https://reviews.llvm.org/D121575
Diffstat (limited to 'llvm/lib/Bitcode/Writer/BitcodeWriterPass.cpp')
0 files changed, 0 insertions, 0 deletions