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author | Philip Reames <preames@rivosinc.com> | 2022-07-12 17:22:55 -0700 |
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committer | Philip Reames <listmail@philipreames.com> | 2022-07-13 08:34:38 -0700 |
commit | fd67992f9c4b811e8db7aa58d8ad53223b089c3f (patch) | |
tree | 2f0758296a8f66ca32dfde1f44f96918e9f09cca /llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | |
parent | d5fa11c4aa6a0037a2320ab0cf680cdb7d0ef238 (diff) | |
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[DAGCombine] fold (urem x, (lshr pow2, y)) -> (and x, (add (lshr pow2, y), -1))
We have the same fold in InstCombine - though implemented via OrZero flag on isKnownToBePowerOfTwo. The reasoning here is that either a) the result of the lshr is a power-of-two, or b) we have a div-by-zero triggering UB which we can ignore.
Differential Revision: https://reviews.llvm.org/D129606
Diffstat (limited to 'llvm/lib/Bitcode/Writer/BitcodeWriter.cpp')
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