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| author | Daniel Sanders <daniel.sanders@imgtec.com> | 2013-09-11 11:58:30 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2013-09-11 11:58:30 +0000 |
| commit | fbcb5829420eae3777de7c7990327ce0b5505de4 (patch) | |
| tree | fb385d64bb81c446aadae296792ea2cfa239a0c4 /llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | |
| parent | 4814eaa9ba0cf04490e5266e9b410dea90fcb7ad (diff) | |
| download | llvm-fbcb5829420eae3777de7c7990327ce0b5505de4.zip llvm-fbcb5829420eae3777de7c7990327ce0b5505de4.tar.gz llvm-fbcb5829420eae3777de7c7990327ce0b5505de4.tar.bz2 | |
[mips][msa] Added support for matching mulv, nlzc, sll, sra, srl, and subv from normal IR (i.e. not intrinsics)
llvm-svn: 190518
Diffstat (limited to 'llvm/lib/Bitcode/Writer/BitcodeWriter.cpp')
0 files changed, 0 insertions, 0 deletions