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| author | Philipp Tomsich <philipp.tomsich@vrull.eu> | 2023-01-24 22:28:22 +0100 |
|---|---|---|
| committer | Philipp Tomsich <philipp.tomsich@vrull.eu> | 2023-01-24 22:36:39 +0100 |
| commit | fb0af89193a9ea0f92eaffb454341987f897f0c7 (patch) | |
| tree | 976c146162b706af072827818d47d00d4fc9ead7 /llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | |
| parent | d8ce50e3c25f667a10750d1129a1b8a060d43492 (diff) | |
| download | llvm-fb0af89193a9ea0f92eaffb454341987f897f0c7.zip llvm-fb0af89193a9ea0f92eaffb454341987f897f0c7.tar.gz llvm-fb0af89193a9ea0f92eaffb454341987f897f0c7.tar.bz2 | |
[AArch64] Add the Ampere1A core
The Ampere1A core improves on the Ampere1 with key differences being:
* memory tagging is supported
* SM3/SM4 are supported
* adds a new fusion pair for (A+B+1 and A-B-1)
(added in a later commit)
Depends on D142395
Reviewed By: dmgreen
Differential Revision: https://reviews.llvm.org/D142396
Diffstat (limited to 'llvm/lib/Bitcode/Writer/BitcodeWriter.cpp')
0 files changed, 0 insertions, 0 deletions