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| author | Thurston Dang <thurston.dang@gmail.com> | 2023-11-17 09:27:32 -0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2023-11-17 09:27:32 -0800 |
| commit | b1338d1e3a8c4b1b4c7364696852f67401fa40ca (patch) | |
| tree | 9745bfae304de1e73a2f76e61ec39ecab1ab9254 /llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | |
| parent | 3ce5c04ad0585e5e14ba9d2f594492a257edf7b1 (diff) | |
| download | llvm-b1338d1e3a8c4b1b4c7364696852f67401fa40ca.zip llvm-b1338d1e3a8c4b1b4c7364696852f67401fa40ca.tar.gz llvm-b1338d1e3a8c4b1b4c7364696852f67401fa40ca.tar.bz2 | |
[tsan] Shrink RiscV64 48-bit LowApp region slightly to speed up TSan RestoreAddr (#72316)
The RiscV64 48-bit mappings introduced in
46cb8d9a325233ac11ed5e90367c43774294d87e necessitated changing
RestoreAddr to use 4-bits as the indicator. This roughly halves the
speed of RestoreAddr, because it is now brute-force testing addresses in
1TB increments, rather than 2TB increments. Crucially, this slowdown
applies to TSan on all platforms, not just RiscV64 48-bit.
This patch slightly shrinks the RiscV64 48-bit LowApp region mapping
(from 5TB to 4TB); we hope that 4TB ought to be enough for anybody,
especially since there is no ASLR applied to the binary in this region.
This allows restoring RestoreAddr to use 3-bits as the indicator again,
thus speeding up TSan on all platforms.
Co-authored-by: Thurston Dang <thurston@google.com>
Diffstat (limited to 'llvm/lib/Bitcode/Writer/BitcodeWriter.cpp')
0 files changed, 0 insertions, 0 deletions