diff options
| author | Simon Tatham <simon.tatham@arm.com> | 2020-03-02 09:05:35 +0000 |
|---|---|---|
| committer | Simon Tatham <simon.tatham@arm.com> | 2020-03-02 10:33:30 +0000 |
| commit | a41ecf0eb05190c8597f98b8d41d7a6e678aec0b (patch) | |
| tree | c3b8a28c1e2ee055ed96fd3187df4185b4f8789e /llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | |
| parent | 12048a9182fc39b25d5e371702b95c7e83054236 (diff) | |
| download | llvm-a41ecf0eb05190c8597f98b8d41d7a6e678aec0b.zip llvm-a41ecf0eb05190c8597f98b8d41d7a6e678aec0b.tar.gz llvm-a41ecf0eb05190c8597f98b8d41d7a6e678aec0b.tar.bz2 | |
[ARM,MVE] Add ACLE intrinsics for VQMOV[U]N family.
Summary:
These instructions work like VMOVN (narrowing a vector of wide values
to half size, and overwriting every other lane of an output register
with the result), except that the narrowing conversion is saturating.
They come in three signedness flavours: signed to signed, unsigned to
unsigned, and signed to unsigned. All are represented in IR by a
target-specific intrinsic that takes two separate 'unsigned' flags.
Reviewers: MarkMurrayARM, dmgreen, miyuki, ostannard
Reviewed By: dmgreen
Subscribers: kristof.beyls, hiraditya, cfe-commits, llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D75252
Diffstat (limited to 'llvm/lib/Bitcode/Writer/BitcodeWriter.cpp')
0 files changed, 0 insertions, 0 deletions