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| author | Ard Biesheuvel <ardb@google.com> | 2021-11-09 10:18:09 +0100 |
|---|---|---|
| committer | Ard Biesheuvel <ardb@kernel.org> | 2021-11-09 18:19:47 +0100 |
| commit | a19da876ab93d54ebc20aadd12820f74220d2f50 (patch) | |
| tree | b112b4f960a4f7c306d500b32027f687d411601f /llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | |
| parent | 48b67dca2cccb4898819797240677f490edcf026 (diff) | |
| download | llvm-a19da876ab93d54ebc20aadd12820f74220d2f50.zip llvm-a19da876ab93d54ebc20aadd12820f74220d2f50.tar.gz llvm-a19da876ab93d54ebc20aadd12820f74220d2f50.tar.bz2 | |
[ARM] implement support for TLS register based stack protector
Implement support for loading the stack canary from a memory location held in
the TLS register, with an optional offset applied. This is used by the Linux
kernel to implement per-task stack canaries, which is impossible on SMP systems
when using a global variable for the stack canary.
Reviewed By: nickdesaulniers
Differential Revision: https://reviews.llvm.org/D112768
Diffstat (limited to 'llvm/lib/Bitcode/Writer/BitcodeWriter.cpp')
0 files changed, 0 insertions, 0 deletions