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authorCraig Topper <craig.topper@intel.com>2018-04-05 18:38:45 +0000
committerCraig Topper <craig.topper@intel.com>2018-04-05 18:38:45 +0000
commit9eec2025c51fa916faa21f4f822bebd4016c11f1 (patch)
tree31e080e96e9c8cd980c58f62c53c8ada9143ad60 /llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
parent9893fe218ccb9a3ae9531e01befc1e8fbb7b8320 (diff)
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[X86] Synchronize the SchedRW on some EVEX instructions with their VEX equivalents.
Mostly vector load, store, and move instructions. llvm-svn: 329330
Diffstat (limited to 'llvm/lib/Bitcode/Writer/BitcodeWriter.cpp')
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