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| author | Luo, Yuanke <yuanke.luo@intel.com> | 2020-11-20 15:19:34 +0800 |
|---|---|---|
| committer | Luo, Yuanke <yuanke.luo@intel.com> | 2020-12-30 13:52:13 +0800 |
| commit | 981a0bd85811fe49379fdbef35528e2c2f3511a3 (patch) | |
| tree | 94c040a6a4126c37369dd8c774c86673bda34678 /llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | |
| parent | bf286b00e9e860a85adaab1214271e374267a033 (diff) | |
| download | llvm-981a0bd85811fe49379fdbef35528e2c2f3511a3.zip llvm-981a0bd85811fe49379fdbef35528e2c2f3511a3.tar.gz llvm-981a0bd85811fe49379fdbef35528e2c2f3511a3.tar.bz2 | |
[X86] Add x86_amx type for intel AMX.
The x86_amx is used for AMX intrisics. <256 x i32> is bitcast to x86_amx when
it is used by AMX intrinsics, and x86_amx is bitcast to <256 x i32> when it
is used by load/store instruction. So amx intrinsics only operate on type x86_amx.
It can help to separate amx intrinsics from llvm IR instructions (+-*/).
Thank Craig for the idea. This patch depend on https://reviews.llvm.org/D87981.
Differential Revision: https://reviews.llvm.org/D91927
Diffstat (limited to 'llvm/lib/Bitcode/Writer/BitcodeWriter.cpp')
| -rw-r--r-- | llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp b/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp index dee7025..4b81ccd 100644 --- a/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp +++ b/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp @@ -913,6 +913,7 @@ void ModuleBitcodeWriter::writeTypeTable() { case Type::LabelTyID: Code = bitc::TYPE_CODE_LABEL; break; case Type::MetadataTyID: Code = bitc::TYPE_CODE_METADATA; break; case Type::X86_MMXTyID: Code = bitc::TYPE_CODE_X86_MMX; break; + case Type::X86_AMXTyID: Code = bitc::TYPE_CODE_X86_AMX; break; case Type::TokenTyID: Code = bitc::TYPE_CODE_TOKEN; break; case Type::IntegerTyID: // INTEGER: [width] |