diff options
| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-04-28 21:01:46 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-04-28 21:01:46 +0000 |
| commit | 868af92235c9e871f952a1bca90a7b035b675a01 (patch) | |
| tree | 2ae7d319257ac0b82ed3d5a77674d4c797331aac /llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | |
| parent | 9bb296cb05284fedf407dd1424bceb214991f5f2 (diff) | |
| download | llvm-868af92235c9e871f952a1bca90a7b035b675a01.zip llvm-868af92235c9e871f952a1bca90a7b035b675a01.tar.gz llvm-868af92235c9e871f952a1bca90a7b035b675a01.tar.bz2 | |
TableGen: Add IntrHasSideEffects property for intrinsics
The IntrNoMem, IntrReadMem, IntrWriteMem, and IntrArgMemOnly intrinsic
properties differ from their corresponding LLVM IR attributes by specifying
that the intrinsic, in addition to its memory properties, has no other side
effects.
The IntrHasSideEffects flag used in combination with one of the memory flags
listed above, makes it possible to define an intrinsic such that its
properties at the CodeGen layer match its properties at the IR layer.
Patch by Tom Stellard
llvm-svn: 301685
Diffstat (limited to 'llvm/lib/Bitcode/Writer/BitcodeWriter.cpp')
0 files changed, 0 insertions, 0 deletions