aboutsummaryrefslogtreecommitdiff
path: root/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
diff options
context:
space:
mode:
authorCraig Topper <craig.topper@sifive.com>2020-11-25 12:10:40 -0800
committerCraig Topper <craig.topper@sifive.com>2020-11-25 12:48:43 -0800
commit751b0d970e757aef055fb6e1a981a7c44185aa80 (patch)
tree781af429ddcfadca165059e0ba81f76489acffe3 /llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
parenta78aaa1ad51214b2e04f41762e76bb43067ea1fd (diff)
downloadllvm-751b0d970e757aef055fb6e1a981a7c44185aa80.zip
llvm-751b0d970e757aef055fb6e1a981a7c44185aa80.tar.gz
llvm-751b0d970e757aef055fb6e1a981a7c44185aa80.tar.bz2
[RISCV] Make SMIN/SMAX/UMIN/UMAX legal with Zbb extension.
This is the logically correct thing to do. But it generates worse code for i32 umin/umax on the rv64 due to type legalize requesting zext even though the arguments are sext. Maybe we can teach type legalizer to use sext for umin/umax for RISCV. It's also producing possibly worse code on i64 on RV32 since we still end up with selects that become branches. But this seems like something we could improve in type legalization or DAG combine. Hopefully this makes D92095 work for RISCV with Zbb.
Diffstat (limited to 'llvm/lib/Bitcode/Writer/BitcodeWriter.cpp')
0 files changed, 0 insertions, 0 deletions