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| author | Craig Topper <craig.topper@sifive.com> | 2021-09-23 14:09:51 -0700 |
|---|---|---|
| committer | Craig Topper <craig.topper@sifive.com> | 2021-09-23 14:18:07 -0700 |
| commit | 70f50114f37e86bd4869a75b1a8313440bd55780 (patch) | |
| tree | 6c31dd9ac32b7bc44776a976edc1914adba94ad8 /llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | |
| parent | 8811227a0c0ac398857988b4fce0fb4dc699468b (diff) | |
| download | llvm-70f50114f37e86bd4869a75b1a8313440bd55780.zip llvm-70f50114f37e86bd4869a75b1a8313440bd55780.tar.gz llvm-70f50114f37e86bd4869a75b1a8313440bd55780.tar.bz2 | |
[RISCV] Add another isel optimization for (and (shl x, c2), c1)
Turn (and (shl x, c2), c1) -> (slli (srli x, c3-c2), c3) if c1 is a
shifted mask with no leading zeros and c3 trailing zeros where c3
is greater than c2.
Diffstat (limited to 'llvm/lib/Bitcode/Writer/BitcodeWriter.cpp')
0 files changed, 0 insertions, 0 deletions