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authorMaksim Levental <maksim.levental@gmail.com>2025-10-20 12:14:52 -0400
committerGitHub <noreply@github.com>2025-10-20 09:14:52 -0700
commit5a112dedff3be9485940dfe5b14b574b08a0d9a1 (patch)
tree619641cdd8e5f5c3ae4e86931aa11c789b4bf92b /llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
parent8c826066e91a53a71322c178e8dec7d5ebf9db2e (diff)
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[MLIR][Python] expose translate_module_to_llvmir (#163881)
This PR exposes `translate_module_to_llvmir` in the Python bindings.
Diffstat (limited to 'llvm/lib/Bitcode/Writer/BitcodeWriter.cpp')
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