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authorbipmis <biplob.mishra@arm.com>2022-12-20 14:34:17 +0000
committerbipmis <biplob.mishra@arm.com>2022-12-20 14:34:17 +0000
commit454997d3965936ebc813d4bea5e3a639fb0e7cb4 (patch)
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parentebe530ef7a49988a531a8928eac3ce0925f1c199 (diff)
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[AAch64] Optimize muls with operands having enough zero bits.
Muls with 64bit operands where each of the operand is having top 32 bits as zero, we can generate a single umull instruction on a 32bit operand. Differential Revision: https://reviews.llvm.org/D139411
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