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| author | David Green <david.green@arm.com> | 2022-12-20 13:50:34 +0000 |
|---|---|---|
| committer | David Green <david.green@arm.com> | 2022-12-20 13:50:34 +0000 |
| commit | 3c0c24e0c1d37e903eab484b34ef854ec785346b (patch) | |
| tree | fb9ff8c922af75eb21b68944309e4b2074a87f8a /llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | |
| parent | ecaab107e4d0a21282cb838b0b505cdea9f87e56 (diff) | |
| download | llvm-3c0c24e0c1d37e903eab484b34ef854ec785346b.zip llvm-3c0c24e0c1d37e903eab484b34ef854ec785346b.tar.gz llvm-3c0c24e0c1d37e903eab484b34ef854ec785346b.tar.bz2 | |
[AArch64] Combine to UMULL if top bits are known zero
Given mul(zext(a), b), we can convert to a umull so long as we know that
the top bits of b are zero. This uses MaskedValueIsZero to detect that
case for NEON UMULL patterns.
Differential Revision: https://reviews.llvm.org/D140287
Diffstat (limited to 'llvm/lib/Bitcode/Writer/BitcodeWriter.cpp')
0 files changed, 0 insertions, 0 deletions