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| author | Craig Topper <craig.topper@sifive.com> | 2025-10-07 22:24:52 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-10-07 22:24:52 -0700 |
| commit | 3bec46ff95888c537dabbf19895d48e3f0eb7b35 (patch) | |
| tree | 6674bf3d2fa5067cfb6be359d672b2b137c6f362 /llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | |
| parent | bd1561d5f160a949c0bbf9bfbda3558eb62f98d7 (diff) | |
| download | llvm-3bec46ff95888c537dabbf19895d48e3f0eb7b35.zip llvm-3bec46ff95888c537dabbf19895d48e3f0eb7b35.tar.gz llvm-3bec46ff95888c537dabbf19895d48e3f0eb7b35.tar.bz2 | |
[RISCV] Reorder ins/outs of atomic instruction to match their assembly order. NFC (#162411)
I think it is more intuitive for the operand order to match the assembly
order than to be sorted by operand name.
I also changed some isel patterns to always use XLenVT for pointer
operands. This shouldn't be a functional change.
Diffstat (limited to 'llvm/lib/Bitcode/Writer/BitcodeWriter.cpp')
0 files changed, 0 insertions, 0 deletions