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| author | Craig Topper <craig.topper@sifive.com> | 2022-04-26 10:42:58 -0700 |
|---|---|---|
| committer | Craig Topper <craig.topper@sifive.com> | 2022-04-26 10:55:14 -0700 |
| commit | 3a9ae9cf7c341ff329550a5bcac8362715d3f4b3 (patch) | |
| tree | 9e8f4fa72a76e7d711551399df3b02b6eb2058cc /llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | |
| parent | f4bb211a3b1600bd56edf17479f77f86ab402d7b (diff) | |
| download | llvm-3a9ae9cf7c341ff329550a5bcac8362715d3f4b3.zip llvm-3a9ae9cf7c341ff329550a5bcac8362715d3f4b3.tar.gz llvm-3a9ae9cf7c341ff329550a5bcac8362715d3f4b3.tar.bz2 | |
[RISCV] Add out of range immediate tests for shifts and rotates on rv64.
We were only testing the shared instruction mnemonics in rv32 tests.
Reviewed By: reames
Differential Revision: https://reviews.llvm.org/D124460
Diffstat (limited to 'llvm/lib/Bitcode/Writer/BitcodeWriter.cpp')
0 files changed, 0 insertions, 0 deletions