diff options
| author | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2016-07-18 14:52:13 +0000 |
|---|---|---|
| committer | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2016-07-18 14:52:13 +0000 |
| commit | 3467e9d0a93db2d0a997168d2231d6860b010784 (patch) | |
| tree | eafeb1133dfa780f2a2560db262bf0b5dab94a25 /llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | |
| parent | ab1b926bb9033018ace8d1dbe780ac954659a94b (diff) | |
| download | llvm-3467e9d0a93db2d0a997168d2231d6860b010784.zip llvm-3467e9d0a93db2d0a997168d2231d6860b010784.tar.gz llvm-3467e9d0a93db2d0a997168d2231d6860b010784.tar.bz2 | |
[Hexagon] HexagonMachineScheduler should account for resources
The machine scheduler needs to account for available resources
more accurately in order to avoid scheduling an instruction that
forces a new packet to be created.
This occurs in two ways: First, an instruction without an available
resource may have a large priority due to other metrics and be
scheduled when there are other instructions with available resources.
Second, an instruction with a non-zero latency may become available
prematurely. In both these cases, we attempt change the priority
in order to allow a better instruction to be scheduled.
Patch by Brendon Cahoon.
llvm-svn: 275793
Diffstat (limited to 'llvm/lib/Bitcode/Writer/BitcodeWriter.cpp')
0 files changed, 0 insertions, 0 deletions
