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author | Gergely Bálint <gergely.balint@arm.com> | 2025-10-07 10:22:14 +0200 |
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committer | GitHub <noreply@github.com> | 2025-10-07 10:22:14 +0200 |
commit | 32eaf5b59c2df16f007156c893cf0c905d9c3db4 (patch) | |
tree | d55b1d3534ba9b5b47f1abee792d5167e1e50e4d /llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | |
parent | 11877408c2e0e467ab3424bd970d5fb2f91d2174 (diff) | |
download | llvm-32eaf5b59c2df16f007156c893cf0c905d9c3db4.zip llvm-32eaf5b59c2df16f007156c893cf0c905d9c3db4.tar.gz llvm-32eaf5b59c2df16f007156c893cf0c905d9c3db4.tar.bz2 |
[BOLT][AArch64] Handle OpNegateRAState to enable optimizing binaries with pac-ret hardening (#120064)
OpNegateRAState is an AArch64-specific DWARF CFI used to change the value
of the RA_SIGN_STATE pseudoregister. The RA_SIGN_STATE register records
if the current return address has been signed with PAC.
OpNegateRAState requires special handling in BOLT because its placement
depends on the function layout. Since BOLT reorders basic blocks during
optimization, these CFIs must be regenerated after layout is finalized.
This patch introduces two new passes:
- MarkRAStates (runs before optimizations): assigns a signedness annotation to each
instruction based on OpNegateRAState CFIs in the input binary.
- InsertNegateRAStates (runs after optimizations): reads the annotations and emits
new OpNegateRAState CFIs where RA state changes between instructions.
Design details are described in: `bolt/docs/PacRetDesign.md`.
Diffstat (limited to 'llvm/lib/Bitcode/Writer/BitcodeWriter.cpp')
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