diff options
author | Zvi Rackover <zvi.rackover@intel.com> | 2017-11-06 08:25:46 +0000 |
---|---|---|
committer | Zvi Rackover <zvi.rackover@intel.com> | 2017-11-06 08:25:46 +0000 |
commit | 312269804039edc8a0bf5fa69a0a6c2656621841 (patch) | |
tree | fdffe8d2b4e6f9f16e318c6050a4f9826c3bed55 /llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | |
parent | 3844f1ad5cd3d4163bb97d065447202c76cacf4e (diff) | |
download | llvm-312269804039edc8a0bf5fa69a0a6c2656621841.zip llvm-312269804039edc8a0bf5fa69a0a6c2656621841.tar.gz llvm-312269804039edc8a0bf5fa69a0a6c2656621841.tar.bz2 |
X86 ISel: Basic support for variable-index vector permutations
Summary:
Try to lower a BUILD_VECTOR composed of extract-extract chains that can be
reasoned to be a permutation of a vector by indices in a non-constant vector.
We saw this pattern created by ISPC, which resolts to creating it due to the
requirement that shufflevector's mask operand be a *constant* vector.
I didn't check this but we could possibly use this pattern for lowering the X86 permute
C-instrinsics instead of llvm.x86 instrinsics.
This change can be followed by more improvements:
1. Handle vectors with undef elements.
2. Utilize pshufb and zero-mask-blending to support more effiecient
construction of vectors with constant-0 elements.
3. Use smaller-element vectors of same width, and "interpolate" the indices,
when no native operation available.
Reviewers: RKSimon, craig.topper
Reviewed By: RKSimon
Subscribers: chandlerc, DavidKreitzer
Differential Revision: https://reviews.llvm.org/D39126
llvm-svn: 317463
Diffstat (limited to 'llvm/lib/Bitcode/Writer/BitcodeWriter.cpp')
0 files changed, 0 insertions, 0 deletions